HSIC Group Signal Integrity Milestones (2021-2025)

Signal Integrity Project

Our project tackles one of the most stubborn pain-points in next-generation interconnect design: how to diagnose and mitigate connector-induced signal degradation at multi-hundred-gigabit data rates—without weeks of full-wave simulation.

We developed a 1D circuit express tool that captures modal impedance, loss, delay, and inter-pair coupling for every quasi-uniform slice of a connector/PCB assembly. The model scales naturally to mixed-mode analysis, so it predicts not only insertion and return loss but also mode conversion and crosstalk—all critical for PAM-4 links.

Measurement validation is performed in our lab to complete the signal integrity evaluation with validated simulation-to-measurement correlation in S-parameters and NRZ/PAM-4 eye diagrams.

Key Achievements
Loading resonance diagnosis and circuit transformation: Identified the root cause of loading resonances and interpreted 3D EM wave transmission/resonances in 1D circuit counterparts
Frequency headroom: Extended validated bandwidth from 40 GHz (2021) to 67 GHz (2024), adequate for 1.6 TbE and upcoming PCIe 7.0.
Speed: Reduced connector optimization loops from days to seconds, accelerating product cycles.
Awards: DesignCon 2024 Best Early-Career Paper Finalist, IEEE EPS Travel Award (ECTC 2025).
Products under anaysis: Genz, PCIe, OSFP, FPIO, MCIO, CPU Socket

Conventional FEM-based SI Diagnosis Workflow

Conferences and Publications

YearVenue & PaperKey Contribution
2023DesignCon – “Distributed-Physical-Based TL Model of PCIe 5.0 Connector for SI Fast DiagnosisFirst public dPBTL showing ≤ 2 % RMSE vs. FEM while delivering an order-of-magnitude speed-up. (ideals.illinois.edu)
2024DesignCon – “m-TL Circuit Model of 5/6 G Connectors for Fast Resonance Crosstalk AnalysisExtended dPBTL to multi-pair (m-TL) circuits, capturing inter-pair coupling with resonant ground cavity due to connector mating. (researchgate.net)
DesignCon – “Crosstalk Mechanisms of Ground Resonance and Stub on 5 G ConnectorsQuantified how differential signal transmission interacts with ground-cavity modes; provided design rules to avoid λ⁄2 resonances. (researchgate.net)
IMS 2024 – “Integrated Distributed Equivalent Circuit Model of PCIe 5.0 Connector with AIC & Baseboard Loading Resonances for Fast SI DiagnosisUnified connector, housing and board effects into a single equivalent circuit; verified to 60 GHz, demonstrated on PCIe 5.0 connector mated on AIC and BB.
(http://dx.doi.org/10.1109/IMS40175.2024.10600341)
2025IEEE T-MTT – “PCIe 5.0 Connector Distributed Physical-Based Circuit Model with Loading Resonances for Fast SI Diagnosis & PathfindingJournal-length expansion of IMS with circuit-guided design pathfinding to enable PCIe 6.0 and PCIe 7.0 up to 128 GT/s PAM-4 (http://dx.doi.org/10.1109/TMTT.2024.3479132)
ECTC 2025 – “Mixed-Mode Distributed Physical-Based TL Model of 5 G Connectors for Fast SI Analysis on Ground Resonances & 112 Gbps PAM-4Extend dPBTL circuit tool to full mixed-mode domain.
Identified the mixed-mode resonance mechanism with quantative EM analysis and circuit validation.
Predicted mixed-mode S-parameter degradations and PAM-4 eye closure; validated at 112 Gbps. (http://dx.doi.org/10.1109/ECTC51687.2025.00118)
ECTC 2025 – “Systematic Crosstalk Reduction Methods towards PCIe 7.0 PAM-4 on LoPro FPIO ConnectorsIntroduced dielectric inserts & air-bridge grounds that meet the emerging 106 Gbps/lane spec with >10 dB crosstalk margin, demonstrated on FPIO. (http://dx.doi.org/10.1109/ECTC51687.2025.00287)
IMS 2025 – “Mixed-Mode Distributed Physical-Based Model on OSFP Connector for Fast PAM-4 Channel Analysis up to 212.5 GbpsApplied mm-dPBTL to actual connector product (OSFP) with detailed quantative mixed-mode field diagnosis and circuit formulation. Desmonstrate accurate mixed-mode S-parameter prediction up to 60 GHz and channel analsysis up to 212.5 Gbps PAM-4 for 1.6 TbE link
HSIC Signal-Integrity (SI) Team (Prof. Milton Feng, Yulin He, Kewei Song, Haonan Wu), recieved Best Early Career Paper Finalist at DesignCon 2024.
Yulin He received IEEE ECTC travel award. Photo with Patrick Thompson (Present, IEEE EPS)

HSIC Demonstrates Superconducting-Processor-Modulated VCSELs for 4K High-Speed Optical Data Link

HSIC group has reported the first demonstration of high-speed optical data link from superconducting processor to room temperature based on the Cryogenic oxide-VCSEL for up to 20 Gb/s NRZ. The cryogenic VCSEL is optically coupled with OM4 fiber at 3-4 Kelvin. The oxide-VCSELs for cryogenic operation are very reliable over 15 thermal cycles between 2.6K and RT for 6-month period.

The article is featured as front cover of IEEE JQE Front_Cover IEEE JQE

The full article can be found at https://doi.org/10.1109/JQE.2022.3149512

HSIC Demonstrates 2.6 K Cryogenic Oxide-VCSEL for 12.5 Gb/s Error-Free NRZ Data Transmission

HSIC Group has demonstrated a 12.5 Gb/s non-return-to-zero error-free data transmission at 2.6 K to the error detector at 295 K. It is a viable solution for an energy-efficient optical data link from 4-K cryo-computing to the end-user at room temperature. The laser emission wavelengths and the related junction temperatures at cryogenic temperatures are also studied.

The article is featured cover page in APL: apl.2021.119.issue-4_cover1.
The full article can be found at 2.6 K VCSEL data link for cryogenic computing: Applied Physics Letters: Vol 119, No 4 (scitation.org)

HSIC’s Taipei Reunion

Former HSIC students treated Prof. Feng to a wonderful dinner in Taipei during his recent visit to Taiwan.

From left to right: Mr. Michael Liu (UIUC), Prof. Henry H. C. Kuo (NCTU), Prof. Milton Feng (UIUC), Dr. Zhuang Tan (Shanghai), Prof. J. J. Huang (NTU), Prof. Wayne C. H. Wu (NTU).

HSIC Alumni Taiwan 2016-03-30 20.17.48

HSIC Demonstrates 57 Gbps Error-Free Data Transmission

HSIC graduate researcher Michael Liu presented HSIC’s latest work on state-of-the-art VCSEL technology at the 2016 Optical Fiber Communication Conference and Exhibition (OFC). The work, done in collaboration with Prof. Milton Feng, Prof. Nick Holonyak, Jr., and graduate researcher Curtis Wang, showed record-breaking 57 Gbps error-free data transmission at room temperature and 50 Gbps at 85 degrees Celsius.

 

Curtis Wang, Michael Liu and Milton Feng for 57 Gb/s VCSEL for Energy Efficient Transmission

Read the full news article here:

Record-speed data transmission could make big data more accessible

Stimulated Photon-Assisted Tunneling in the Transistor Laser

Prof. Milton Feng and graduate students Curtis Wang and Junyi Qiu (pictured) along with Prof. Nick Holonyak, Jr. have discovered the phenomenon of intra-cavity photon-assisted tunneling (ICpaT) in the Transistor Laser. This phenomenon is unique to the Transistor Laser with its three-port structure and electrical/optical ouput, where photon absorption in the collector promotes a very quick tunneling process that serves as a direct-voltage-modulation scheme. Under this scheme, the Transistor Laser can be modulated down to the femtosecond range, much faster than direct-current-modulated diode lasers.

This work is sponsored by the Air Force Office of Scientific Research.

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Read the full news article here:

Light helps the transistor laser switch faster

HSIC at CSICS 2015

Prof. Milton Feng was in new Orleans for CSICS 2015 to accept the CSICS 2014 Best paper Award for the paper titled  “Advanced Process and Modeling on 600+ GHz Emitter Ledge Type-II GaAsSb/InP DHBT”. Here he is pictured with co-author Dr. Barry Wu (Keysight Technologies) and Symposium Chair Dr. Charles Campbell (Triquint).

CSICS 2014 Best Paper nr2

 

 

Congratulations to Dr. Huiming Xu: Best Paper at CSICS 2014

Congratulations to Dr. Huiming Xu for winning Best Paper at the Compound Semiconductor IC Symposium (CSICS) 2014 for his paper titled “Advanced Process and Modeling on 600+ GHz Emitter Ledge Type-II GaAsSb/InP DHBT”. This paper addresses the problem of surface recombination in the extrinsic base region of a DHBT which limits the current gain and scalability of the device. Using an AlInP ledge to passivate the extrinsic base, the current gain was improved by 50%. The best performance device showed fT/fMAX = 480/620 GHz and β=24.

CSICS_Gummel